H7076
THE UNIVERSITY OF SUSSEX
ELECTRONIC CIRCUIT & SYSTEMS DESIGN
Candidates must attempt THREE out of FOUR questions
If all four questions are attempted, all will be marked, but the lowest mark will
not be counted in the total for the paper.
Exam Session: 3 hours
You should spend 2 hours answering the exam questions and allow 1 hour
for scanning, uploading, and checking your submission.
Examination handout: none
Read Academic Integrity Statement
You MAY access online materials, notes etc. during this examination. You
must complete this assessment on your own and in your own words. DO NOT
discuss this assessment with others before the end of its 24-hour window. By
submitting this assessment, you confirm that your assessment includes no
instances of academic misconduct, for example plagiarism or collusion. Any
instance of academic misconduct will be thoroughly investigated in
accordance with our academic misconduct regulations
H7076 ELECTRONIC CIRCUIT & SYSTEMS DESIGN
1.
(a) Draw carefully a typical set of characteristics for an n-p-n bipolar
transistor (i.e. collector emitter voltage, VCE versus collector current, IC for
different values of base current, IB). Label your set of characteristic curves
indicating the regions of “cut-off”, “saturation”, “active” and “breakdown”.
[6 marks]
(b) Design a base biased amplifier for midpoint bias where the supply
voltage, VCC = 15 V, the collector saturation current, IC = 10 mA and the
transistor current gain, = 150. Specify component values for your design.
[4 marks]
(c) Draw a circuit diagram for your amplifier design in part (b) including
any capacitors required with a brief description of their function.
[6 marks]
(d) On the set of characteristics you have drawn in part (a), construct a
load line showing the cut-off voltage, the collector saturation current and
the quiescent operating point for your amplifier design.
[4 marks]
2.
(a) Name the class of power amplification which is based on the mid-point
biasing scheme. What is the typical efficiency of such a power amplifier
[4 marks]
(b) State the reasons for using other biasing schemes apart from mid-point
bias, when designing power amplifiers.
[4 marks]
(c) Choose another class of power amplification which overcomes the
limitations of the simple mid-point bias scheme, illustrate its operation by
drawing a load line on a set of characteristic curves, marking the
quiescent operating point and outlining the chosen amplifier’s main
application.
[6 marks]
(d) Draw a circuit diagram for a power amplification stage of the class you
have chosen, indicating how you would satisfy the biasing requirements.
[4 marks]
(e) Estimate the quiescent power dissipation for your circuit when
delivering 40 W to a load.
[2 marks]
H7076 ELECTRONIC CIRCUIT & SYSTEMS DESIGN
3
3. The specification for a high gain amplifier built using op-amps states that it
must have a voltage gain of 10,000, a small signal bandwidth of 100 kHz
and an input impedance of >100 M .
(a) Explain briefly why a multistage amplifier will be required to meet
these specifications. [4 marks]
(b) Given the requirement for high input impedance what would be the
most suitable circuit configuration for the first stage of the amplifier and
what type of device would you choose for your operational amplifier and
why (e.g. JFET, CMOS or bipolar). [4 marks]
(c) Decide how many stages of amplification you require and design each
of these based on one of the following devices shown in Table Q3.
Indicate which device you have chosen for each stage and state why.
What offset voltage do you expect to see at the output
Table Q3
Device A B C
Input offset voltage 10 V 100 V 5 mV
Input impedance 10 M 1 G 100 G
Gain bandwidth product (GBW) 10 MHz 1 MHz 1 MHz
[8 marks]
(d) Draw a circuit diagram for your complete design including the
component values you have chosen. [4 marks]
4. (a) Design of a single non-inverting op-amp amplifier with a voltage gain
of +25 dB.
i. Draw the circuit schematic and calculate possible resistor values.
ii. If an input signal with a frequency of 100 kHz, a peak to peak voltage
of 200 mV and a DC offset of 1 V should be applied to this amplifier,
calculate the minimum gain-bandwidth product, and the minimum slew
rate of the op-amp (assume the supply voltage to be sufficiently large).
[10 marks]
(b) Two identical capacitors CWB and two identical resistors RWB are used
to transform a non-inverting amplifier into a Wien bridge oscillator with an
oscillation frequency of 15 kHz. Draw the circuit schematic and calculate
vales for CWB and RWB. [5 marks]
(c) Sketch the qualitative output signal vs. time of the circuit from (b) and
make a statement about the behaviour (assume the oscillator output
amplitude at t =0 s is 1 V) if:
i. The non-inverting amplifier has a gain of 1.5.
ii. The non-inverting amplifier has a gain of 3.
iii. The non-inverting amplifier has a gain of 4.5.
[5 marks]
End of paper
