MCC150 – Implementation of Digital Signal Processing Systems Project: Design of a communication system Sining An, Chi Zhong, Zhongxia Simon He Version 1.2 – April 27, 2022 I. Introduction After four labs, you have built a communication system with BPSK signal. You have done symbol timing recovery, carrier phase recovery and demodulation. From the previous lab, you have noticed that there is a phase ambiguity when the phase offset > 2 or < 2 . You need to come up with a solution to remove the phase ambiguity and recovery the bit stream correctly. Beside the phase offset, there is normally a frequency offset between the transmitter and receiver carriers, which also needs to be considered and removed during demodulation. II. Project task 1. Change the random phase offset to the range of > > . 2. To simulate the frequency offset, a frequency offset need to be added at the transmitter side. Generate a random offset frequency between 5 kHz to 10 kHz in your setup script. 3. Using numerically controlled oscillator (NCO) and Mixer at the transmitter side to generate a baseband signal with frequency offset. 4. At the receiver side, recover the bit stream with no phase ambiguity. Hint: you can use differential encoding at the transmitter side and do decoding at the receiver side to realize the demodulation. Ref: https://www.rfwireless-world.com/Terminology/differential-encoder-vs- differential-decoder.html 5. Save the recovered bit stream from signal tap and compare it with the tx.data to see if you have error bits. You need to align the transmit and recovered bits before check the bit error. Notice that you need to capture longer data from signal tap to calculate the bit error rate in home assignment 3. III. Assignment A report describing your project work should be handed in on Canvas before 23:59 on Sunday, May 22nd. The report should be maximum 4 pages long, and should contain descriptions of the blocks designed in DSP Builder and their functionality, and solutions to the home assignment questions below, including the resulting figures. When handing in your report, you will need to submit both a .pdf version of your report and a .zip archive containing your DSP Builder project. 1. Show the blocks diagram of your design. Explain your design. 2. Show a screenshot of the SignalTap window with captured signals include: signal from PRBS generator, I_in and Q_in, Symb_I and Symb_Q, recovered bit stream. 3. How much error bits you have among 1000 recovered bits Note this 1000 is the number of bits instead of the number of samples. 4. If there is error bit, where error bit would occur What causes this error 5. How can you avoid error bits